Generally, a floating point operand consists of three elements, the first being a sign bit, the second being mantissa bits, and the third being an exponent. For example, a 32 bit floating point operand is represented according to the IEEE (institute of electrical and electronic engineers) standard as follows:
                    (                  -          l                )            S                      --                  -                      sign            --                              -        ×            1.      ⁢                          ⁢      M      ⁢                          ⁢      23                      --                  -                      mantissa            --                              -        ×            2              (                              E            ⁢                                                  ⁢            8                    -          127                )                            --                  -                      exponent            --                              -      
Typically, a floating point addition operation includes an arithmetic operation on two floating point operands. For example, the arithmetic operation on the two floating point operands includes the following steps:                1. Making the exponents of the two floating point operands (operands) same by downshifting the mantissa of the operand having a lower exponent.        2. Adding the mantissas of both the operands (with or without a rounding operation) and outputting an added number.        3. Downshifting the added number by one bit if the added number overflows (for example, in a 32 bit addition, the added number overflows if the added number exceeds 32 bits).        
The above outlined floating point addition operation requires a full downshifter, an adder, and a one-bit downshifter.
Similarly, the floating point subtraction operation also generally includes an arithmetic operation on the two operands. Conventional techniques perform the subtraction operation using two parallel processing paths, referred to as the far processing path and the near processing path, and selecting the output of one of the processing paths as the subtraction result.
The near processing path operation is used, if the difference between the exponents of both the operands is one or zero. Since the exponent difference is one or zero, downshift operation of a maximum of one bit is needed to make the exponents equal. After making the exponents equal, shifted mantissas are subtracted from other remaining mantissas. In such an instance, the most significant bit (MSB) can be at any bit location in the subtraction result. As a result, one full upshifter may be required to bring the MSB to a 1st location (and the exponent is subtracted by the amount equal to an upshift). The 1st location is referred from the left side of the subtracted number. For example, in a 32 bit subtractor, the MSB of the result can be anywhere between the 32nd bit to the 1st bit. In such a case, the MSB has to be upshifted to a highest of 32nd bit location and this generally requires a 32 bit upshifter. Thus, near processing path subtraction can require a one 1 bit downshifter, a one 32 bit subtractor, and a 32 bit upshifter.
The far processing path operation is used if the difference between the exponents of both the operands is more than one. The exponent difference of the far processing path can be more than one and can be any number. As a result, a full downshifter is required to make the exponents of the two operands same by downshifting the mantissa. The mantissa of the operand having a smaller input exponent is then subtracted from the mantissa of the other operand. The subtracted result can then require a 1 bit upshift operation. As a result, the far processing path subtraction operation can require a full downshifter, a full subtractor, and a 1 bit upshifter. For example, a 32 bit far processing path subtraction can require a 32 bit downshifter, a 32 bit subtractor, and a 1 bit upshifter.
Therefore, the above near processing path floating point subtraction operation can either require an exponent subtractor or any other logic to detect the exponent difference of the two operands. The near processing path does the subtraction if the mantissa difference is 0, 1, or −1. This exponent subtraction logic time can be significant. During this time, the near processing path remains idle, i.e., it will be waiting for the outcome of the exponent difference logic. This can significantly add to the overall subtraction operation time when using the above-described near processing path and the far processing path technique. Further, operations, such as rounding, upshift error correction, underflow detection, and the downshifted mantissa select can also take significant amount of additional logic time when using the above far processing path and near processing path technique for the floating point subtraction.